(a) Field of the Invention
The present invention relates to a drive circuit having a power recovery system and, more particularly, to a drive circuit for driving a capacitive load such as scanning electrodes or data electrodes in an electroluminescence display panel (ELDP) or a plasma display panel (PDP).
(b) Description of the Related Art
VGA monochrome ELDP or PDP systems have 480 scanning electrodes extending parallel to one another in the horizontal direction and 640 data electrodes extending parallel to one another in the vertical direction on a display panel. Each pixel element is disposed at the intersection between one of the scanning electrodes and one of the data electrodes. A pair of drive circuits are generally provided each for driving scanning lines connected to respective scanning electrodes or data lines connected to respective data electrodes to turn on or off each pixel element.
The ELDPs and PDPs generally utilize a high electric field for controlling each pixel element, and accordingly, have a large parasitic capacitance in the scanning lines or data lines due to the arrangement of the electrodes. For example, an ELDP has a parasitic capacitance as high as 3000 pF involved in each scanning line. In the operation of the drive circuit, the electric power once provided to a scanning electrode or data electrode is recovered to charge another scanning electrode or data electrode.
A technique for driving scanning lines or data lines in an ELDP is described in, for example, "38th Sharp Technical Report" pp61-65, 1987. FIG. 1 shows the basic configuration of the drive circuit described in the report. An integrated circuit (IC) 101 implementing a drive circuit in an ELDP comprises a pair of source terminals 2 and 3 for receiving a high potential VDD2 (240 volts) and a low potential VSS2 (0 volt), respectively, of a high-voltage source, and a plurality of (480, for example) drive sections DS1-DS3 each having a high-voltage CMOSFET including a p-MOSFET 107 and an n-MOSFET 108 for driving, through an output terminal 104-106, a corresponding one of the scanning lines represented as capacitors 111-113. A parasitic diode 109 or 110 is formed between the source and drain of each of the MOSFETs.
FIGS. 2A and 2B show the operations of one of the drive sections DS1-DS3 in FIG. 1 in a positive potential mode. FIG. 2A illustrates a step for raising the potential of the scanning line 111 up to 240 volts and FIG. 2B illustrates a subsequent step for lowering the potential of the scanning line 111 from 240 volts to 0 volt. In FIG. 2A, the source voltage is maintained at 240 volts, and this voltage is applied through the p-MOSFET 107, which is ON, through a current path designated by numeral 114. In FIG. 2B, the source potential VDD2 is lowered down to 0 volt, with the p-MOSFET 107 being maintained ON, thereby recovering the electric charge stored in the scanning line 111 through the current path designated by numeral 115 including the parasitic diode 109 to the high potential source line VDD2. The recovered charge can be used for the next step for charging another scanning line from the high potential source line VDD2 to thereby save the electric power.
If the electric charge is drained to the low potential line VSS2 instead, as shown by a dotted line 116 in FIG. 2B, the electric power cannot be recovered and this configuration is not generally employed in ELDP or PDP. A negative potential mode is generally combined alternately with the positive potential mode described above. In the negative potential mode, the scanning line is applied with 0 volt or -180 volts depending on the data to be displayed. The data lines are similarly driven by a similar drive circuit having a lower voltage configuration, wherein the source line VDD2 is applied with 60 volts or 0 volt.
In the operation of the ELDP wherein 60 image frames are displayed for every second, for example, the electric power Prs which can be recovered from the scanning line is a mean of the recovered power Prs(pos) in the positive potential mode and the recovered power Prs(neg) in the negative potential mode. Recovered powers Prs(pos) and Prs(neg) can be expressed by the function of C.sub.s (capacitance (pF) of each scanning line), .DELTA.V (source voltage), N.sub.f (number of image frames per second), Ns (number of scanning lines) and .eta..sub.1 (efficiency), for example, as follows: ##EQU1##
The electric power can be also recovered from the data lines and depends on the contents of the image data then provided. The electric power Prd recovered from the data lines can be calculated as Prd=2.80 watts from the equation as recited below if the coefficient .eta..sub.2, which depends on the contents of the image data, is assumed at .eta..sub.2 =0.05. ##EQU2##
In the positive potential mode, the pixel elements disposed on the selected scanning line which is applied with 240 volts and having data of "L" (corresponding to 0 volts) on the data line are subjected to 240 volts, which exceeds the threshold voltage of 210 volts, resulting in ON state of the pixel elements for discharge thereof. On the other hand, the pixel elements disposed on the selected scanning line and having data of "H" (corresponding to 60 volts) on the data line are subjected to 180 volts, which is below the threshold voltage, resulting in OFF state of the pixel elements.
In the negative potential mode, the pixel elements disposed on the selected scanning line which is applied with -180 volts and having data of "L" (corresponding to 0 volt) on the data line are subjected to 180 volts to be turned OFF, whereas the pixel elements disposed on the selected scanning line and having data of "H" (corresponding to 60 volts) on the data line are subjected to 240 volts to be turned ON for discharge.
In the above conventional technique for recovering electric power from the scanning lines or data lines by switching the voltage of the source lines, the output voltage from the drive circuit tends to exceed the high potential source voltage VDD2 or become below the low potential source voltage VSS2 as a result of the source line being fixed to the source potential VDD2 and the voltage drop of the recovery current. In this case, a latch-up failure sometime arises in the CMOSFET, which must be suppressed by the design of the CMOSFET and increases the occupied area for the CMOSFETs.
In addition, the current recovered from a scanning line or a data line corresponds in magnitude to several hundreds times the current supplied to other scanning line or data line, and further, the capacitance of the scanning line or data line from which electric power is recovered is large due to the floating state of the scanning line or data line. As a result, electric charge is stored on the junction capacitance of the parasitic diodes associated with the output transistors, which retards an efficient recovery of the electric power from the scanning lines.